134 research outputs found

    Towards automatic Markov reliability modeling of computer architectures

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    The analysis and evaluation of reliability measures using time-varying Markov models is required for Processor-Memory-Switch (PMS) structures that have competing processes such as standby redundancy and repair, or renewal processes such as transient or intermittent faults. The task of generating these models is tedious and prone to human error due to the large number of states and transitions involved in any reasonable system. Therefore model formulation is a major analysis bottleneck, and model verification is a major validation problem. The general unfamiliarity of computer architects with Markov modeling techniques further increases the necessity of automating the model formulation. This paper presents an overview of the Automated Reliability Modeling (ARM) program, under development at NASA Langley Research Center. ARM will accept as input a description of the PMS interconnection graph, the behavior of the PMS components, the fault-tolerant strategies, and the operational requirements. The output of ARM will be the reliability of availability Markov model formulated for direct use by evaluation programs. The advantages of such an approach are (a) utility to a large class of users, not necessarily expert in reliability analysis, and (b) a lower probability of human error in the computation

    Fault-free validation of a fault-tolerant multiprocessor: Baseline experiments and workoad implementation

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    In the future, aircraft employing active control technology must use highly reliable multiprocessors in order to achieve flight safety. Such computers must be experimentally validated before they are deployed. This project outlines a methodology for doing fault-free validation of reliable multiprocessors. The methodology begins with baseline experiments, which test single phenomenon. As experiments progress, tools for performance testing are developed. This report presents the results of interrupt baseline experiments performed on the Fault-Tolerant Multiprocessor (FTMP) at NASA-Langley's AIRLAB. Interrupt-causing excepting conditions were tested, and several were found to have unimplemented interrupt handling software while one had an unimplemented interrupt vector. A synthetic workload model for realtime multiprocessors is then developed as an application level performance analysis tool. Details of the workload implementation and calibration are presented. Both the experimental methodology and the synthetic workload model are general enough to be applicable to reliable multi-processors besides FTMP

    Validation of multiprocessor systems

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    Experiments that can be used to validate fault free performance of multiprocessor systems in aerospace systems integrating flight controls and avionics are discussed. Engineering prototypes for two fault tolerant multiprocessors are tested

    Realising context-sensitive mobile messaging

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    Mobile technologies aim to assist people as they move from place to place going about their daily work and social routines. Established and very popular mobile technologies include short-text messages and multimedia messages with newer growing technologies including Bluetooth mobile data transfer protocols and mobile web access.Here we present new work which combines all of the above technologies to fulfil some of the predictions for future context aware messaging. We present a context sensitive mobile messaging system which derives context in the form of physical locations through location sensing and the co-location of people through Bluetooth familiarity

    Application design for wearable and context-aware computers

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    Optimal static and dynamic recycling of defective binary devices

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    The binary Defect Combination Problem consists in finding a fully working subset from a given ensemble of imperfect binary components. We determine the typical properties of the model using methods of statistical mechanics, in particular, the region in the parameter space where there is almost surely at least one fully-working subset. Dynamic recycling of a flux of imperfect binary components leads to zero wastage.Comment: 14 pages, 15 figure

    Optimal combinations of imperfect objects

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    We address the question of how to make best use of imperfect objects, such as defective analog and digital components. We show that perfect, or near-perfect, devices can be constructed by taking combinations of such defects. Any remaining objects can be recycled efficiently. In addition to its practical applications, our `defect combination problem' provides a novel generalization of classical optimization problems.Comment: 4 pages, 3 figures, minor change

    Area efficient architectures for information integrity in cache memories

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